2.1 NAND gate ICs
Now that you can produce HIGH and LOW logic signals and monitor the logic state of any point in a circuit, either by connecting a voltmeter, or by lighting up an LED, you can start to investigate the properties of logic gates and other logic integrated circuits.
NAND gates are the most useful variety of logic gate because they can be connected together to make all the other types of gate, including AND, OR, NOR and EXOR. In fact, many logic integrated circuits have an internal structure which consists entirely of NAND gates. Different gates have different symbols described later in this Chapter.
There are several families of logic ICs, each with particular properties and power supply requirements. One of the most important distinctions is between 74 series devices which are intended for use with a 5 V power supply, and 4000 series devices, which can work with any power supply from 3-15 V. It is essential to know that the pin arrangements of the two types of IC are quite different. You can't replace a 74 series NAND gate IC by plugging a 4000 series device into the same socket.
The diagrams below show the pin layout for NAND gate ICs in each of the two series:
The first 74 series devices were manufactured using a technology known as transistor-transistor logic, or TTL. The first 4000 series devices used an alternative technology known as complementary metal oxide silicon, or CMOS.
The technology of manufacturing integrated circuits does not stand still. More recent versions of 74 series devices remain compatible with the original devices in the sense that they have the same power supply requirements, can be used in the same circuits, and have identical pin arrangements. However, the TTL manufacturing process is largely obsolete and most new 74 series devices are made using developments of the CMOS process.
It is not necessary for you to know the details of all the different logic families at this point in the course, provided you remember that a 74 type number IC is going to need a 5 V power supply, while a 4000 type number IC can operate with power supplies from 3-15 V. In general, 4000 series devices require less current and are useful for battery-operated projects.
NAND gates are the most useful variety of logic gate because they can be connected together to make all the other types of gate, including AND, OR, NOR and EXOR. In fact, many logic integrated circuits have an internal structure which consists entirely of NAND gates. Different gates have different symbols described later in this Chapter.
There are several families of logic ICs, each with particular properties and power supply requirements. One of the most important distinctions is between 74 series devices which are intended for use with a 5 V power supply, and 4000 series devices, which can work with any power supply from 3-15 V. It is essential to know that the pin arrangements of the two types of IC are quite different. You can't replace a 74 series NAND gate IC by plugging a 4000 series device into the same socket.
The diagrams below show the pin layout for NAND gate ICs in each of the two series:
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| Pin layouts of NAND gate ICs |
The technology of manufacturing integrated circuits does not stand still. More recent versions of 74 series devices remain compatible with the original devices in the sense that they have the same power supply requirements, can be used in the same circuits, and have identical pin arrangements. However, the TTL manufacturing process is largely obsolete and most new 74 series devices are made using developments of the CMOS process.
It is not necessary for you to know the details of all the different logic families at this point in the course, provided you remember that a 74 type number IC is going to need a 5 V power supply, while a 4000 type number IC can operate with power supplies from 3-15 V. In general, 4000 series devices require less current and are useful for battery-operated projects.
2.2 NAND gate truth table
Build the circuit shown in the diagram below. You can do this from scratch, or by inserting a 4011 CMOS IC and rearranging some of the components on the prototype board saved from Chapter 1.
Clicking the new button 
under the diagram opens a small window showing the pin layout for the 4011, so that you can check the inputs and outputs of the individual NAND gates.
With CMOS circuits, it is good practice to include a decoupling capacitor, 47 μF, or 100 μF, connected across the power supply. This prevents the transmission of voltage 'spikes' along the power supply lines. More complex circuits won't function properly without decoupling capacitors and you should think of them as part of the recipe needed to get CMOS circuits to work.
The push button switches are wired with pull down resistors. What kind of logic signal will you get when you press the button? With pull down resistors, you get a HIGH voltage, logic 1, when the switch is pressed. Operate the switches in all combinations to complete the following table:
The output is HIGH when the LED is illuminated and LOW when the LED is off. Representing an open switch by '0' and a closed switch by '1' and writing '0' for LOW and '1' for HIGH should give the NAND gate truth table:
Check through your circuit until you get this result. Possible errors include misplaced, or missing wire links.
By convention, input A is the rightmost input column. The reason for this becomes clear when you find out more about binary numbers: A refers to the least significant bit of a binary number.
Now modify your circuit, as shown in the next prototype board layout:
This gives you two new ways of driving an LED. The circuit diagram for the system you have built is:
The small numbers correspond to the pins of the 4011 IC.
Although LED 1 and LED 2 are both connected to a NAND gate with its inputs connected together, they are driven in different ways. LED 1 is connected between +4.5 V and the output of the second NAND gate, pin 11. This means that LED 1 will light up when the output of the driving NAND gate goes LOW. Check that LED 1 follows the NAND gate truth table, as before.
Now compare this with the behaviour of LED 2, wired from the output of the third NAND gate, pin 4, to 0 V. LED 2 lights up when the output of its NAND gate goes HIGH. As a result, its behaviour is opposite to that of LED 1. In fact, LED 2 follows the AND gate truth table, as follows:
In this circuit, you have used NAND gates connected to make two other gates. These are NOT and AND gates:
Looking again at the circuit diagram, you can see that the output of the first NAND gate is a valid logic signal. The current taken from this point by the other two NAND gates is small and what is meant to be a HIGH voltage will actually be a HIGH voltage. This is not true after the NAND gates which drive the LEDs. 4011 NAND gates can provide just enough current to drive LEDs, but the HIGH and LOW voltages will be pulled away from their normal values and must not be used as inputs to other parts of the logic circuit.
It is instructive to measure the HIGH and LOW voltages at the outputs of the gates using a voltmeter (you know how to do this) and compare these values with the normal HIGH and LOW voltages.
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   4011: NAND gate truth table |
under the diagram opens a small window showing the pin layout for the 4011, so that you can check the inputs and outputs of the individual NAND gates.With CMOS circuits, it is good practice to include a decoupling capacitor, 47 μF, or 100 μF, connected across the power supply. This prevents the transmission of voltage 'spikes' along the power supply lines. More complex circuits won't function properly without decoupling capacitors and you should think of them as part of the recipe needed to get CMOS circuits to work.
The push button switches are wired with pull down resistors. What kind of logic signal will you get when you press the button? With pull down resistors, you get a HIGH voltage, logic 1, when the switch is pressed. Operate the switches in all combinations to complete the following table:
| switch B | switch A | output |
| open | open | |
| open | closed | |
| closed | open | |
| closed | open |
| input B | input A | output |
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
| NAND gate truth table |
By convention, input A is the rightmost input column. The reason for this becomes clear when you find out more about binary numbers: A refers to the least significant bit of a binary number.
Now modify your circuit, as shown in the next prototype board layout:
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 4011: Driving LEDs using NAND gates |
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| Driving LEDs using NAND gates: circuit diagram |
Although LED 1 and LED 2 are both connected to a NAND gate with its inputs connected together, they are driven in different ways. LED 1 is connected between +4.5 V and the output of the second NAND gate, pin 11. This means that LED 1 will light up when the output of the driving NAND gate goes LOW. Check that LED 1 follows the NAND gate truth table, as before.
Now compare this with the behaviour of LED 2, wired from the output of the third NAND gate, pin 4, to 0 V. LED 2 lights up when the output of its NAND gate goes HIGH. As a result, its behaviour is opposite to that of LED 1. In fact, LED 2 follows the AND gate truth table, as follows:
| input B | input A | output |
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
| AND gate truth table |
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| NOT and AND gates |
It is instructive to measure the HIGH and LOW voltages at the outputs of the gates using a voltmeter (you know how to do this) and compare these values with the normal HIGH and LOW voltages.
2.3 Other gates using NAND gates
Start again with the prototype board layout used for investigating the NAND gate truth table:
Modify the circuit by rearranging links. The new links are shown in yellow:
Confirm that this circuit follows the truth table of an AND gate. It will if you inserted the new links correctly. Rearrange the links again:
A little care is needed to locate the links correctly. Zoom in to check. Open the popup window showing the pin diagram of the 4011. (If nothing appears, you may already have opened this window and will be able to select it from the task bar.) Can you work out how the NAND gates are connected?
The circuit diagram looks like this:
You should find that the circuit follows the truth table for an OR gate:
How can you make a NOR gate? This is easy: add a NOT gate to the existing circuit:
Confirm that your circuit follows the truth table for a NOR gate:
If you have built and tested all these circuits on prototype board, you will have started to see how versatile NAND gates can be. Soon you won't be able to forget how the individual NAND gates are arranged inside the 4011. This is good because lots of other 4000 series logic ICs with different gates share the same arrangement.
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| NAND gate truth table |
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| Which logic gate is this? |
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| Which logic gate is this? |
The circuit diagram looks like this:
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| Connecting NAND gates to make an OR gate |
| input B | input A | output |
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
| OR gate truth table |
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| Building a NOR gate from NAND gates |
| input B | input A | output |
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
| NOR gate truth table |
2.4 Building an EXOR gate
To work out an arrangement of NAND gates which will give the same truth table as exclusive OR, also called EXOR, XOR and EOR, requires a little more thought. The truth table for EXOR is:
How does the truth table differ from the ordinary version of an OR gate, also known as inclusive OR? Check back if you don't know.
To work out the NAND gate circuit, you need to summarise the truth table in a different way. Look at the output column. The output is 1 when:
These slightly strange statements give a clue as to how the circuit must be built. Each of the parts of the statement can be replaced by the appropriate logic gate, AND, OR, or NOT:
The diagram uses the symbols for NOT, AND and OR gates. Identify input A. The output of the first NOT gate is the opposite of A, or NOT A, often written as 
. You should be able to see that the output of the top AND gate will be 1 when (A is 0 AND B is 1). Similarly, the output of the second AND gate will be 1 when (A is 1 AND B is 0).
Placing an OR between these statements means that the final output is 1 if (A is 0 AND B is 1) OR (A is 1 AND B is 0), matching the EXOR truth table.
The next step is to replace the NOT, AND and OR gates with their NAND gate equivalents:
This circuit uses only NAND gates, but can be simplified by removing double NOT gates, as follows:
The process described above for working out the NAND gate equivalent which gives the EXOR truth table can be used to solve any simple logic problem. The steps in the process are:
You could verify the NAND gate circuit for EXOR by building it on prototype board, but don't unless you are seriously keen.
| input B | input A | output |
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
| EXOR gate truth table |
To work out the NAND gate circuit, you need to summarise the truth table in a different way. Look at the output column. The output is 1 when:
These slightly strange statements give a clue as to how the circuit must be built. Each of the parts of the statement can be replaced by the appropriate logic gate, AND, OR, or NOT:
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| EXOR using NOT, AND, and OR |
. You should be able to see that the output of the top AND gate will be 1 when (A is 0 AND B is 1). Similarly, the output of the second AND gate will be 1 when (A is 1 AND B is 0).Placing an OR between these statements means that the final output is 1 if (A is 0 AND B is 1) OR (A is 1 AND B is 0), matching the EXOR truth table.
The next step is to replace the NOT, AND and OR gates with their NAND gate equivalents:
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| Substituting NAND gate equivalents |
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| Removing double NOT gates |
- Work out the truth table for the logic system.
- Use the output column of the truth table to work out a logic statement which describes the action of the logic system. This involves writing a statement for each line in the truth table for which the output is 1, and linking these statements with OR.
- Convert the logic statement into a network of gates using AND, OR, NOT, as appropriate.
- Replace AND, OR, NOT by their NAND gate equivalents.
- Simplify the circuit by removing any double NOT gates.
You could verify the NAND gate circuit for EXOR by building it on prototype board, but don't unless you are seriously keen.
2.5 More logic ICs
The 4000 series includes NOT gate ICs, and ICs with 2-input AND, OR, NOR and EXOR gates. In addition, 3-input, 4-input and 8-input gates are available. The 
Beastie Zone lists the most useful devices.
As an example, here is the test circuit for a 4002 4-input NOR gate:
This circuit uses a 9 V power supply. When you build the prototype board version, connect a 9 V PP3 battery instead of the 3xAA 4.5 V arrangement you have been using so far. You can use the same battery clip:
Beastie Zone lists the most useful devices.As an example, here is the test circuit for a 4002 4-input NOR gate:
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| Test circuit for 4002 4-input NOR gate |
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| 4002: Test circuit for 4-input NOR gate |
pins symbol to see how the gates are arranged inside the integrated circuit.You have already seen the truth table for a 2-input NOR gate:
| input B | input A | output |
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
| NOR gate truth table |
Because there are 4 inputs, the truth table will have 24=16 lines:
| input D | input C | input B | input A | output |
| 0 | 0 | 0 | 0 | 1 |
| 0 | 0 | 0 | 1 | 0 |
| 0 | 0 | 1 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 | 0 |
| 1 | 0 | 0 | 0 | 0 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 0 |
| 1 | 0 | 1 | 1 | 0 |
| 1 | 1 | 0 | 0 | 0 |
| 1 | 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 0 | 0 |
| 1 | 1 | 1 | 1 | 0 |
| 4-input NOR gate truth table |
Check the truth tables of other 3-input and 4-input gates from the
Beastie Zone. How many lines would there be in the truth table for an 8-input logic gate? 2.6 Schmitt trigger logic gates
Typical CMOS inputs have a single threshold. If the voltage applied to the input is less than half the power supply voltage, it counts as a '0', while if the voltage is more than half the power supply voltage, it counts as a '1'.
A Schmitt trigger input has two different thresholds. The best way of understanding how this works is to investigate the behaviour of a Schmitt trigger device in a practical circuit. The circuit below uses a 40106 hex inverting Schmitt trigger (NOT gate):
Build the circuit and then adjust the 10 kΩ potentiometer until the voltmeter reads close to 0 V. The input to the NOT gate clearly counts as a '0'. Click the pins button to see how the gates are arranged inside the 40106.
Since the input to the NOT gate is '0', the output is '1' and the indicator LED is illuminated.
Now slowly adjust the potentiometer to increase the input voltage. Note the voltage reached when the LED suddenly switches off. This is the first threshold. Carry on increasing the voltage up to 9 V.A Schmitt trigger input has two different thresholds. The best way of understanding how this works is to investigate the behaviour of a Schmitt trigger device in a practical circuit. The circuit below uses a 40106 hex inverting Schmitt trigger (NOT gate):
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| 40106: Investigating a Schmitt trigger NOT gate |
pins button to see how the gates are arranged inside the 40106.Since the input to the NOT gate is '0', the output is '1' and the indicator LED is illuminated.
Adjust the potentiometer slowly in the opposite direction, decreasing the voltage at the input to the NOT gate. What happens when the voltage reaches the first threshold? Nothing happens: the LED remains off. Keep on reducing the input voltage and note the voltage reached when the LED suddenly switches on. This is the second threshold.
Repeat the experiment several times: the device has two distinct thresholds depending on whether you start adjusting the voltage from 0 V, or from 9 V. A device like this is said to show hysteresis. Typically, these thresholds are located at 1/3 and 2/3 of the power supply voltage, 3 V and 6 V with a 9 V power supply.
Plotting a graph of output voltage against input voltage gives the result shown in the next diagram:
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| Graph showing the action of a Schmitt trigger NOT gate |
Why would you want a Schmitt trigger logic gate?
A gate with a single switching threshold behaves erratically if the input signal is noisy or degraded. If the input voltage is close to the threshold, the output is likely to oscillate between 0 and 1, or may be somewhere in between. With a Schmitt trigger gate, this is impossible. The output is either 0 or 1 and cannot be intermediate. Schmitt trigger devices are often used to 'clean up' noisy input signals, passing on a tidy sequence of 0's and 1's to other parts of the circuit. This is what Schmitt trigger devices are for.
A useful bonus of Schmitt trigger behaviour is that you can make an astable using one resistor, one capacitor and a Schmitt trigger NOT gate. Modify your prototype board as follows:
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| 40106: Schmitt trigger NOT gate astable |
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| Schmitt trigger NOT gate astable |
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| Graph showing Schmitt trigger astable input and output voltages |
The HIGH and LOW times of the astable pulse output each correspond to a half charge time, 0.69RC. The period of the pulse waveform is 0.69RC + 0.69RC and the frequency of the pulses is given by:
In practice, the Schmitt trigger thresholds are not fixed exactly and it is better to approximate the frequency as:
This is a great way of making a cheap and cheerful astable for testing a counter circuit, but is not the astable to choose if you want an exact frequency.
